HW Developer page for driving FETs on VemsFrontier/ArmEfi
Issues
- We need fast swithcon / switchoff.
- We must be careful when driving FETgate from 5..6V at 15625 Hz. 5.5V is better than 5V, and 6V is much better.
- using at max 1..2 outputs (not 3..6) per logic chip is preferred
- good output power (essence of the above)
- temperature >=85C
- D=SOIC or smaller package (PW = TSSOP)
- 1 clock should drive max 4 channels (because changing more channels simultaneously has disadvantages) => min 2 clock sources preferred
- Issue if GND5 rises because of poor wiring
Decisions:
- powerful 3-NAND solution from 74AHCT132PW TSSOP chips (from Philips or TID). The first NAND (U14) is GND and GND+5V supplied , the 2nd and 3d NANDs are GND5 and GND5 + 5.5 .. 6V supplied.
- supply MC33269DT-6 or 5.5V ( the right voltage, or adjustable or 5V + 0.65V diode under GND). 78L05 is not powerful enough, and MC33269 is just better (for this!)
- use an exotic value (329 nF) for all decoupling caps, so the manufacturing script can easily set the value for all (prolly 330nF) without messing other caps that need exact values
- 0603 FETgate resistor would be safer (than leaving out gate resistor). Will likely be 10 Ohm (not 22) finally, we decide while PCB is being manufactured
Why Schmitt inputs?
PGND=GND5 below (power ground), different (but close) than the MCU, which is on GND.
The reason for going with Schmitt inputs is that the logic will be on GND5. When turning on a FET GND5 _will_ increase somewhat compared to GND. I just want to take every precaution to avoid oscillation which would make the FETs very hot. The peace of mind is worth a few additional chips. Especially with the other advantage: we also douple the gate driving power.
When GND5 rises
When fitting the NAND chips as FET and IGBT drivers I found that they will not be possible to turn off if GND5 rises. The GND5 alarm will tell us that we are about to start a fire but we will be unable to turn the switches off!
Requirements:
- 3 states (off / on / PWMing)
- when PGND rises (input effectively goes to low), the output switch off automagically
- original idea was to use AND logic as drivers but they are not available with Schmitt inputs.
- then thinking about a standard AND and a schmitt buffer: problem is that the HEX Inverters have less driver power per FET then the NANDs acording to the datasheets (All logic seem to have the same supply limitation).
- best solution so far: 3 NAND per channel. Use quad NAND chips and let each NAND chip drive two FET's and two inverter coupled NANDs I get twice as much power and perfect schmitt-inputs with automagical turnoff when PGND rises!
With 2 NOR gates per channel: (3 external inputs, 1 of them is clock)
| U2_1 | U1_1 | U1_2(clock) | U1_out (U2_2) | U2out(FETgate) |
| 1 | x | x | x | 0 |
| 0 | 1 | x | 0 | 1 |
| 0 | 0 | c | -c | c |
Note that only 2 gates per channel would also work with NAND gate logically. But when PGND rises, NAND gate would switch the FET on. The NOR gate switches the FET off, as expected.
Nice solution, but it seem like NOR is a phantom chip, expensive as hell too => NAND is a much safer choice. NAND are much (5x) cheaper at digikey than NOR, that is at least alarming.
With 3 NAND gates (solution currently in eagle): (3 external inputs, 1 of them is clock). I don't write U2out column, you can calc it from -U2out=U3out=(U2_1 AND U2_2)
| U2_1 | U1_1 | U1_2(clock) | U1_out (U2_2) | U3out(FETgate) |
| 0 | x | x | x | 0 |
| 1 | 0 | x | 1 | 1 |
| 1 | 1 | c | -c | -c |
Hunt begins.
From the catalog of the backup distributor (price is in 1/180 USD units):\n
CD4093BCN (FAI) QUAD 2-INPUT NAND SCHMITT TRIGG.D 28,40 HEF4093BP (PSH) QUAD 2-INPUT NAND SCHMITT TRIGG.D 35,20 HCF4093BEY (STM) * QUAD 2-INPUT NAND SCHMITT TRIG 29,90 MC14093BCP (ONS) * QUAD 2-INPUT NAND SCHMITT TRIG 29,90 CD4093BE (TI) * QUAD 2-INPUT NAND SCHMITT TRIGG.D 19,40 ... N74F132N (PSH) QUAD 2-INPUT NAND SCHMITT TRIGGERS 41,20 M74HC132B1R (STM) QUAD 2-INPUT NAND SCHMITT TRIGG 26,90 MC74HC132AN (ONS) * QUAD 2-INPUT NAND SCHMITT TRI 30,80 SN74HC132N (TI) * QUAD 2-INPUT NAND SCHMITT TRIGG 23,40 CD74HCT132E (TI) QUAD 2-INPUT NAND SCHMITT TRIGGE 30,60 T74LS132B1 (STM) QUAD 2-INPUT NAND SCHMITT TRIGGE 18,00 54LS132/RBDQ (MOT) QUAD 2-INPUT NAND SCHMITT TRIG 118,00
Main distributor:\nÿ2ÿ
74AHCT132PW is reasonable spec,price and shipping time (5 weeks)in MOQ=2000 => our choice. +25% price compared to 74HCT132PW and 5 weeks instead of 1 (SOIC chips), but nice choice.
Brainstorming - other options?
Is there any small/cheap but powerful output (20mA outputs, at least 50mA total) CPLD that operates from 5..6V (we would put it to PGND of course). The main processor would send CRC protected messages to it, and it could act as a full TPU. Since we have a lot of communication between the GND and PGND sides, some smarties would be justified. A smaller AVR or other u-controller could do it as well. Cost is more programming, benefit might be PCB real estate.
[XC9536] (44 pin package) is close, but still a bit low spec for pullup (pulldown 24mA is nice spec). It would work, but 74AHCT132 is probably safer design choice.
- if we do that I would like to see one with 10/100 ethernet like the MC9S12NE64 - sounds like a bit too big and pricey (especially development costs).
- COP444L-UZV/N (NSC) 4-BIT MICROCONTR. 28 pin (under 1 Euro)
- several PAL types: surprisingly cheap. Can be programmed by orcad schematics (or probably other ways).
they will lose there memory from temp, voltage, time
so you will have deaths over time and the parts will have to be replaced.
make sure:
- 5.5 .. 6V supply voltage. Note that the small 100mA 78L05 are usually somewhat below 5V, eg. 4.9V. The MC33269DT-5 is rock precise. 5.8 +- 0.1V supply would be ideal. Maybe the adjustable is not a bad idea. The FETs really like 5V or more when PWMed. The HCT and especially the AHCT chips can also stand 6V continuously (so no risk to get close to 5.5V), even though the input threshold is only specified for upto 5.5V supply but the trend suggests linear => >2.4V input means high even at 6V.